I. Field of the Disclosure
The technology of the disclosure relates generally to comparator circuits and content-addressable memory (CAM) circuits and related systems and methods.
II. Background
Content-addressable memory (CAM) is a type of computer memory particularly suited for use in high-speed searching applications. Unlike standard random access memory (RAM) in which a memory address is supplied and the RAM returns the data word stored at that memory address, CAM implements a look-up table function. The look-up table function determines if supplied compare data is stored in any memory locations in the CAM. If so, either the data word or a list of one or more memory locations in the CAM containing the data matching the supplied compare data is returned. CAM provides high-speed access to data, because CAM employs dedicated comparator circuitry to perform the look-up function typically within a single clock cycle. CAM is also known as associated memory or associative storage, because CAM provides an associative array in hardware.
FIG. 1 illustrates a block diagram of an exemplary CAM 10. The CAM 10 is comprised of an array of multiple entries. The multiple entries comprise one or more tag data fields 12 and one or more corresponding comparators 14 and RAM data fields 16. Each tag data field 12 includes one (1) bit of data or multiple bits of data to form tag data. In the CAM 10 illustrated in FIG. 1, the tag data field 12 is comprised of 0-M bits to form a tag data word M+1 bits in length. A 0-N-sized array of N+1 physical registers, each comprising a tag data field 12 and a corresponding comparator 14 and RAM data field 16, is provided to provide multiple tag data entries in the CAM 10. A separate comparator circuit is provided in the comparator 14 for each bit in the tag data field 12. When a read function in the CAM 10 is performed, compare data 18 is provided and input into each comparator 14 to compare the compare data 18 against the tag data stored in each tag data field 12. For each compare data 18 that matches the tag data in any tag data field 12, the corresponding comparator 14 generates a signal indicating a match on a corresponding match line 20. Because there are typically multiple copies of the same tag data contained in different tag data fields 12 in the CAM 10, the correct tag data field 12 is marked by a valid bit (VLD) 22.
Either static logic-based comparators (“static-based”) or dynamic-based comparators can be employed in CAMs. In a dynamic-based comparator, a dynamic comparator circuit is provided for each bit of tag data. A dynamic comparator circuit employs two pairs of transistors that implement a pulldown path on a match line. A mismatch between a bit of tag data and a corresponding bit of compare data in any of the dynamic comparator circuits activates a pulldown path on the match line to ground. A match between all bits of tag data and all bits of corresponding compare data decouples the match line from ground. Dynamic comparator circuits are generally faster than static-based comparator circuits, because they evaluate by turning on a transistor to discharge an already precharged node. Static-based comparators use complementary metal oxide semiconductor (CMOS) logic where state transitions are dependent upon turning off a transistor while turning on another and are typically slower than dynamic-based comparator circuits. However, dynamic-based comparator circuits consume more power than static-based comparator circuits. Static circuits consume dynamic power when the circuit's input change causes a corresponding output change, while dynamic circuits consume dynamic power every clock cycle due to the precharge phase even when there is no input or output switching activity.
Increased power dissipation due to unnecessary switching of comparator circuits for invalid tag data may be particularly undesirable for CAMs included in battery-powered electronic devices. Increased power dissipation results in quicker battery drain and shorter battery life. It may therefore be desirable to employ static-based comparator circuits in a CAM to reduce power consumption.